To provide a semiconductor memory integrated circuit in which sufficient read-out margin can be obtained by suppressing stress of a current driving type memory cell.

A MTJ-MRAM cell consisting of MTJ and a selection switch transistor QS is used for a memory cell MC. A sense amplifier SA connected to a bit line BL to which data of the memory cell MC are read out is constituted by using an operation amplifier OP. An inverse input terminal of the operation amplifier OP is connected to the bit line BL, and a fixed potential VC is given to a non-inverse input terminal. A drain and a gate of a PMOS transistor Q31 for a clamp used as a current source for charging a bit line are connected to the inverse input terminal of the operation amplifier OP, and a source is feedback-controlled by an output of the operation amplifier OP. Thereby, a clamp potential of the bit line BL is fixed to VC.