Title:
SEMICONDUCTOR MEMORY AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
Japanese Patent JP2002151658
Kind Code:
A
Abstract:
To provide a semiconductor memory and the manufacturing method for preventing defect generation and improving an integration degree, without increasing manufacturing processes.
This semiconductor memory is provided with a semiconductor substrate 1, a ferroelectric capacitor 8 formed on the semiconductor substrate 1 whose one electrode is insulated, a conductive layer 9 formed above the ferroelectric capacitor 8 whose end part is provided above the ferroelectric capacitor, and an inter layer insulation film 10 covering the semiconductor substrate 1, the ferroelectric capacitor 8 and the conductive layer 9.
Inventors:
TOKIWA NAOYA
Application Number:
JP2000341591A
Publication Date:
May 24, 2002
Filing Date:
November 09, 2000
Export Citation:
Assignee:
TOSHIBA MICRO ELECTRONICS
TOSHIBA CORP
TOSHIBA CORP
International Classes:
H01L21/768; H01L21/8246; H01L23/522; H01L27/10; H01L27/105; (IPC1-7): H01L27/105; H01L21/768; H01L27/10
Attorney, Agent or Firm:
Togawa Hideaki
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