SEMICONDUCTOR MEMORY AND SEMICONDUCTOR MODULE USING THE SAME

Title:

SEMICONDUCTOR MEMORY AND SEMICONDUCTOR MODULE USING THE SAME

Document Type and Number:

Japanese Patent JP2003059297

Kind Code:

A

Abstract:

To provide a semiconductor memory which can be shifted to a test mode in a module state.

Each of DRAMs 11-28 is provided with a test mode circuit 280. The test mode circuit 280 detects power source voltage Vcc1 having a voltage level at normal operation in accordance with a test mode shift signal MRS1 and generates a test mode signal TM of a L level. And the test mode circuit 280 detects power source voltage Vcc2 having a higher voltage level than a voltage level at normal operation in accordance with a test mode shift signal MRS2 and generates a test mode signal TM of a H level. A control circuit 391 controls peripheral circuits such as a column decoder 290 so that input/output of data for testing specific operation of a plurality of memory cells included in a memory cell array 320 is performed when receiving a L level test mode signal TM and a H level test mode signal TM.

Inventors:

HAMAMATSU RIYOUJIN
TANAKA SHINJI

Application Number:

JP2001240686A

Publication Date:

February 28, 2003

Filing Date:

August 08, 2001

Export Citation:

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Assignee:

MITSUBISHI ELECTRIC CORP

International Classes:

G01R31/28; G01R31/3185; G06F12/16; G11C11/401; G11C29/14; G11C29/46; (IPC1-7): G11C29/00; G01R31/28; G01R31/3185; G06F12/16; G11C11/401

Attorney, Agent or Firm:

Hisami Fukami (4 outside)

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