PURPOSE: To set storage capacity to be large through the use of a semiconductor memory where there is a defective memory cell.

CONSTITUTION: Semiconductor memories M1, M2 and M3 with ROM 10 writing the address of the defective memory cell, to which CPU 1 accesses, and a control part 2 which is provided with a storage part 2b storing the address that is read from the ROM 10 and an address conversion part 2b converting the stored address into the address which is not stored are provided. When the address to be accessed is stored, it is converted into the address of the memory cell, which is not stored. The memory cell of the converted address is accessed.