PURPOSE: To prevent an active region from being etched in patterning a floating gate and control gate in semiconductor nonvolatile memory and reduce the dynamic resistance of the active region.

CONSTITUTION: A floating gate 20 is formed in three stages: Patterning to obtain the pattern shown in the figure, patterning simultaneous with that of the drain side of a control gate 26, and patterning simultaneous with that of the source side of the same, shown in the center of the figure. These patterning operations are carried out through silicon oxide film/polysilicon mixture etching. In the patterning simultaneous with that of the source side of the control gate 26, shown in the center of the figure, the projected region on the source side of the floating gate 20 functions as an etching stopper. This prevents the active region directly under the control gate 26 from being etched, and reduces the dynamic resistance of the active region.