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Title:
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF THE SAME
Document Type and Number:
Japanese Patent JP2015095655
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor package and a manufacturing method of the same.SOLUTION: In a semiconductor package in which semiconductor chips can be laminated regardless of the size of the semiconductor chip and a manufacturing method of the same, the semiconductor package comprises: a package base substrate; at least one first semiconductor chip attached to the package base substrate; a first molding member which does not cover a top face of the at least one first semiconductor chip; at least one second semiconductor chip which is laminated on the at least one first semiconductor chip so as to bridge a surface of the at least one first semiconductor chip and a surface of the first molding member; and a second molding member which covers and packs the at least one second semiconductor chip.

Inventors:
MA KEUM-HEE
CHO TAISAI
KIN TOMOAKI
Application Number:
JP2014228689A
Publication Date:
May 18, 2015
Filing Date:
November 11, 2014
Export Citation:
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Assignee:
SAMSUNG ELECTRONICS CO LTD
International Classes:
H01L25/065; H01L23/29; H01L23/31; H01L25/07; H01L25/18
Domestic Patent References:
JP2002184936A2002-06-28
JP2013004766A2013-01-07
JP2012142572A2012-07-26
JP2010027926A2010-02-04
JP2012191062A2012-10-04
JP2000299431A2000-10-24
JP2007150346A2007-06-14
JP2011061004A2011-03-24
JP2012109437A2012-06-07
JPH0927573A1997-01-28
JP2002124627A2002-04-26
Foreign References:
US20120139125A12012-06-07
US20120070939A12012-03-22
US20110156233A12011-06-30
Attorney, Agent or Firm:
Shinya Mitsuhiro