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Title:
SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR MODULE
Document Type and Number:
Japanese Patent JP2007305911
Kind Code:
A
Abstract:

To provide a semiconductor package that prevents damage, thus improving the reliability of a component.

On a semiconductor package 10A, there are arranged a semiconductor element 20 formed into a plate shape. The semiconductor element 20 has a first power terminal 22 and a control terminal 23 on its principal surface 21a, and a second power terminal 25 on its back surface 21b facing the first surface 21a; a first electrode plate 30 so arranged that it faces the principal surface 21a of the semiconductor element 20 which has a first power electrode 32 projecting to the principal surface 21a and joined with the first power terminal 22; a second electrode plate 40 so arranged that it faces the back surface 21b of the semiconductor 20 which has a second power electrode 41a joined with a second power terminal 25; and an insulating substrate 50 arranged between the semiconductor element 20 and the first electrode plate 30 which has an opening 52 that the first power electrode 32 passes through and a control electrode 53 joined with the control electrode 23. The first power electrode 32 is formed so that it surrounds the planar-directional ambience of the control electrode 53.

COPYRIGHT: (C)2008,JPO&INPIT


Inventors:
YOSHIOKA SHINPEI
WATANABE NAOTAKE
TANIMOTO MITSUYOSHI
Application Number:
JP2006135137A
Publication Date:
November 22, 2007
Filing Date:
May 15, 2006
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01L25/07; H01L25/18
Attorney, Agent or Firm:
Hidekazu Miyoshi
Iwa Saki Kokuni
Kawamata Sumio
Nakamura Tomoyuki
Masakazu Ito
Shunichi Takahashi
Toshio Takamatsu