Title:
SEMICONDUCTOR PACKAGE
Document Type and Number:
Japanese Patent JP2006093679
Kind Code:
A
Abstract:
To provide a semiconductor package which can be mounted on a packaging substrate with high reliability by reducing warpage caused by thermal stress.
The semiconductor package comprises a first interposer substrate 3 on which a first semiconductor chip 2 is disposed, a second interposer substrate 5 on which a second semiconductor chip 4 is disposed, a mold resin 7 which is charged between the interposer substrates and seals the first semiconductor chip and the second semiconductor chip, and a radiator plate 6. The first semiconductor chip and the second semiconductor chip are arranged so as to have line symmetry with respect to a center line L.
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Inventors:
KAI AKIRA
Application Number:
JP2005241952A
Publication Date:
April 06, 2006
Filing Date:
August 24, 2005
Export Citation:
Assignee:
SONY CORP
International Classes:
H01L25/18; H01L25/065; H01L25/07
Domestic Patent References:
JP2001119147A | 2001-04-27 | |||
JPH04304693A | 1992-10-28 | |||
JP2002314034A | 2002-10-25 | |||
JP2003318361A | 2003-11-07 | |||
JP2003243574A | 2003-08-29 | |||
JPH0235453U | 1990-03-07 |
Attorney, Agent or Firm:
Ariyoshi Noriharu
Shuichiro Ariyoshi
Shuichiro Ariyoshi
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