Title:
半導体パッケージ及び半導体装置
Document Type and Number:
Japanese Patent JP6586629
Kind Code:
B2
Abstract:
A semiconductor package includes a first substrate including a first surface layer where a first pad region and a second pad region are formed, the first pad region including a plurality of first pads for connection to a first IC, the second pad region including a plurality of second pads for connection to a second substrate, and a second surface layer where a third pad region including a plurality of third pads for connection to a second IC is formed, the second surface layer being formed on an opposite side of the first surface layer. The second pads surround the first pad region in at least three rows, and one or more pads included in the second pads and arranged in an inner portion are connected to one or more pads included in the first pads and to one or more pads included in the third pads.
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Inventors:
Nakamura Maki
Taku Fujita
Taku Fujita
Application Number:
JP2015013836A
Publication Date:
October 09, 2019
Filing Date:
January 28, 2015
Export Citation:
Assignee:
Panasonic IP Management Co., Ltd.
International Classes:
H01L25/065; H01L25/07; H01L25/18
Domestic Patent References:
| JP2007123705A | ||||
| JP2009170802A | ||||
| JP2001203318A | ||||
| JP2006190747A | ||||
| JP2002314034A |
Foreign References:
| US20030201521 | ||||
| WO2014175133A1 |
Attorney, Agent or Firm:
Kenji Kamada
Koichi Nomura
Koichi Nomura