Title:
SEMICONDUCTOR PRODUCTION SYSTEM, METHOD FOR FABRICATING SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING CIRCUIT BOARD
Document Type and Number:
Japanese Patent JP2004259923
Kind Code:
A
Abstract:
To increase the clearance between the end part of a semiconductor chip and the lead terminal of a tape substrate while suppressing the height of a bump electrode.
A bonding stage 16 is arranged such that the end part 16a thereof is located at the position of the end part 35a of a semiconductor chip 35 and the semiconductor chip 35 is mounted on the tape substrate 31 while sucking the tape substrate 31 through a suction groove 17.
Inventors:
TAKANO MICHIYOSHI
Application Number:
JP2003048818A
Publication Date:
September 16, 2004
Filing Date:
February 26, 2003
Export Citation:
Assignee:
SEIKO EPSON CORP
International Classes:
H01L21/60; (IPC1-7): H01L21/60
Attorney, Agent or Firm:
Tetsuya Mori
Yoshiaki Naito
Cui Shu Tetsu
Yoshiaki Naito
Cui Shu Tetsu
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