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Title:
半導体保護装置
Document Type and Number:
Japanese Patent JP4375077
Kind Code:
B2
Abstract:

To provide a semiconductor protecting device 1 capable of reducing the possibility that a surge voltage becomes excessive owing to resonance by an LC equivalent circuit 49 formed between a surge protecting circuit 7 and a capacitor element 9.

The semiconductor protecting device 1 is equipped with a surge protecting circuit 7 which clamps the surge voltage by a DMOS transistor 13 and a capacitor element 9 connected to the surge protecting circuit 7 in parallel. Then the surge protecting circuit 7 and capacitor element 9 are incorporated in an IC 3, which is molded with IC molding resin 11. Consequently, a wire connecting the surge protecting circuit 7 and capacitor element 9 becomes short, so an inductance component L of the LC equivalent circuit 49 becomes small. Consequently, the resonance frequency f0 of the LC equivalent circuit 49 can be fixed at a high frequency, so that the probability that the surge voltage becomes excessive owing to resonance is reducible.

COPYRIGHT: (C)2006,JPO&NCIPI


Inventors:
Tadatoshi Asada
Susumu Ueda
Hiroshi Toyoda
Application Number:
JP2004089838A
Publication Date:
December 02, 2009
Filing Date:
March 25, 2004
Export Citation:
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Assignee:
株式会社デンソー
International Classes:
H01L21/822; H01L27/04; H01L23/62; H01L27/06; H01L29/78
Domestic Patent References:
JP10313095A
JP4243157A
JP2000058666A
Attorney, Agent or Firm:
Kenji Ishiguro



 
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