To provide a semiconductor storage device having a memory cell array performing injection of source side channel hot electrons by which data can be written in plural memory transistors or can be read out from the transistors in parallel, and increasing operation speed of a program including verifying can be realized.

A memory cell is constituted of a first memory transistor MT1, a second memory transistor MT2, and a select-transistor SG sharing a channel forming region between these transistors, in a MONOS type (MNOS type) non- volatile memory or a floating gage type non-volatile memory performing injection of source side channel hot electron, simultaneous program pulse applying is performed for bit units located on a word line every several bits, verifying of same bit unit is performed continuously.