To suppress the increase of a chip area or power consumption of a semiconductor storage device by lowering an operating voltage in rewriting operation to a memory cell which is provided with a variable resistance element and a selection transistor.

This storage device is provided with a rewriting means for performing two rewriting operations such as a first rewriting operation for changing the electric resistance of the variable resistance element 11 to a second state from a first state by applying a predetermined first voltage between both ends of the memory cell 10 and applying predetermined gate potential to a gate of the selection transistor 12, and a second rewriting operation for changing the electric resistance of the variable resistance element 11 to the first state from the second state by applying a predetermined second voltage having polarity opposite to that of the first voltage between both ends of the memory cell 10 and applying the predetermined gate potential to the gate of the selection transistor 12. Polarity and absolute values of the voltages applied to both ends of the variable resistance element in the memory cell of a rewriting object are different from each other in the first rewriting operation and second rewriting operation.