To provide a semiconductor storage device with a smaller space area on a surface of a semiconductor substrate.

Each memory cell MC of this MRAM includes a magnetic resistor 18 and two access transistors 19a and 19b. Drains of the transistors 19a and 19b are connected to a corresponding bit line BL via the magnetic resistor 18, gates thereof are connected to a corresponding word line WL, and sources thereof are connected to a source line SL and an auxiliary line AL, respectively. Thus, the source of the access transistors 19b and the source of a driver transistor 23 included in a DL driver 14 can be used in common, thereby reducing a space area on a surface of a silicon substrate 31.