Title:
半導体記憶装置
Document Type and Number:
Japanese Patent JP6602328
Kind Code:
B2
Abstract:
According to one embodiment, a semiconductor includes a first wiring, a second wiring, a first electrode, a second electrode and a memory cell. The first wiring extends in a first direction. The second wiring extends in a second direction crossing the first direction. The first electrode is connected to the first wiring. The second electrode is connected to the second wiring. The memory cell is arranged between the first electrode and the second electrode. The memory cell includes a memory element electrically connected to the first electrode, and a selector provided between the memory element and the second electrode and electrically connected to the second electrode, and the memory element and the selector are of a same conductivity type.
Inventors:
Yoshiaki Asao
Application Number:
JP2017038335A
Publication Date:
November 06, 2019
Filing Date:
March 01, 2017
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L21/8239; H01L27/105; H01L35/16; H01L45/00
Domestic Patent References:
| JP2013115437A | ||||
| JP2007158325A | ||||
| JP2012033649A | ||||
| JP2010067942A |
Foreign References:
| WO2016118160A1 |
Attorney, Agent or Firm:
Suzue International Patent Office