PURPOSE: To improve bias voltage using efficiency and reliability for a nonvolatile memory element which has a floating gate structure by providing a laminate of a thin film which allows a high dielectric constant and a silicon oxide film between a control electrode and a floating gate area.

CONSTITUTION: A nonvolatile semiconductor storage device is provided with a floating gate area 4 between the channel area 9 of a MOS transistor and a control gate electrode 1. A laminate of a thin film 2 which allows a high dielectric constant and a silicon oxide film 3 is provided between the control electrode 1 and the floating gate area 4. Therefore, a capacity of the interlayer film between the control gate 1 and the floating gate 4 becomes large and bias voltage reduction and memory cell area reduction are allowed. Higher operation is allowed and a cell which allows higher reliability than a cell whose interlayer film is composed of only ferroelectric substance is formed.