PURPOSE: To make the read/write of data possible to be carried out even in the period of precharge and to attain reading out the data in the same word line serially.
CONSTITUTION: A semiconductor storage device is provided with a memory cell group 3 integrating and forming a random accessable memory cell on a semiconductor substrate in matrix, a bit line BL commonly connecting plural pieces of memory cells in the memory cell group 3 and a sense amplifier 1 making these bit lines be a pair and sensing the potential difference between the bit lines BLi, /BLi made to be a pair. The data storage nodes Ai, /Ai of a register 4 with self sense amplifying ability are connected with the bit lines BLi, /BLi through transfer gates Q30, Q31, and the data of the register 4 are read out successively synchronizing with an external input trigger signal /CAS through an input/output line after the data are transferred from the memory cell to the register 4.
JP2003068099 | SEMICONDUCTOR MEMORY |
JPH03160686 | RESETTING CIRCUIT |
JP2845187 | [Title of Invention] Semiconductor storage device |
JPS5956276A | 1984-03-31 |