PURPOSE: To make high speed reading possible by simple constitution by delaying successively data read out in parallel at different delay time and cutting off a data line transmitting preceding by one at the time of outputting data.
CONSTITUTION: When row/column address is taken in, data are read out from a memory cell array 11 and sent to data lines L1WLn through an output buffer. Data sent to the data line L1 are outputted through a switch S1 and an output driver 15. Data sent to the data line L2 are delayed by a specified time by a delay circuit D2. Then, a switch controlling circuit C2 controls the switch S1 and cuts off the data line L1 and outputted from a driver 15. Similar operation is made for data lines L3WLn. Accordingly, efficient reading can be made at high speed setting output time by the delay time.
TOSHIBA MICRO CUMPUTER ENG