Title:
SEMICONDUCTOR STORAGE
Document Type and Number:
Japanese Patent JP3913709
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor storage capable of a high-speed read and having memory cells of an one transistor/one memory-cell structure formed on an SOI substrate.
SOLUTION: The semiconductor storage has an element substrate having a semiconductor layer which is separated from an underlying substrate via an insulation layer and has a plurality of memory cells arranged and formed in the semiconductor layer of the element substrate. Each memory cell has a MOS-transistor structure having a floating-state body. Further, the semiconductor storage has a memory-cell array for storing data by bringing the body into a majority-carrier accumulating state, and has sensing-amplifier circuits for so reading the data of the selected memory cell of the memory-cell array as to store the data in data latches and for so transferring the read data to an output circuit as to return and write the data at the same time into the selected memory cell.
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Inventors:
Tamio Ikehashi
Takashi Osawa
Katsuyuki Fujita
Takashi Osawa
Katsuyuki Fujita
Application Number:
JP2003132091A
Publication Date:
May 09, 2007
Filing Date:
May 09, 2003
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L21/8242; H01L27/108; G11C7/06; G11C11/22; G11C11/401; G11C11/404; G11C11/406; G11C11/409; G11C11/4091; G11C16/00; (IPC1-7): H01L21/8242; G11C11/401; G11C11/404; H01L27/108
Domestic Patent References:
JP2003132682A | ||||
JP7240091A | ||||
JP1146915A | ||||
JP2002260381A | ||||
JP56119986A | ||||
JP8321185A | ||||
JP2003086711A |
Foreign References:
WO2001003190A1 | ||||
US20030035324 |
Attorney, Agent or Firm:
Masaru Itami
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