Title:
半導体基板
Document Type and Number:
Japanese Patent JP6463517
Kind Code:
B2
Abstract:
A semiconductor substrate according to the present invention includes a nitride semiconductor layer 203, an amorphous semiconductor layer 205 formed on one main surface side of the nitride semiconductor layer 203, a high-roughness layer 206 which is a semiconductor layer formed on the amorphous semiconductor layer 205 and has a surface roughness larger than the amorphous semiconductor layer 205, and a diamond layer 207 formed on the high-roughness layer 206. Damage to the nitride semiconductor layer can be reduced in forming the diamond layer on the nitride semiconductor layer and adhesion between the layers can be increased.
Inventors:
Tomohiro Shinagawa
Takeo Furuhata
Tomohisa Shingo
Takeo Furuhata
Tomohisa Shingo
Application Number:
JP2017565642A
Publication Date:
February 06, 2019
Filing Date:
February 03, 2017
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
H01L21/02; C23C14/06; C23C16/27; C30B25/18; C30B29/04; H01L21/20; H01L21/205; H01L21/338; H01L29/778; H01L29/812
Domestic Patent References:
| JP2010157603A | ||||
| JP2004532513A | ||||
| JP5251364A | ||||
| JP2015517205A | ||||
| JP2011084411A | ||||
| JP2009238971A | ||||
| JP2010067662A |
Foreign References:
| WO2015027080A2 |
Attorney, Agent or Firm:
Yoshitake Hidetoshi
Takahiro Arita
Takahiro Arita