Title:
半導体ウェーハの分割システム及び分割方法
Document Type and Number:
Japanese Patent JP4669162
Kind Code:
B2
Abstract:
A semiconductor wafer dividing method for dividing a semiconductor wafer, in which a plurality of rectangular regions are demarcated by streets arranged in a lattice pattern on the face of the semiconductor wafer, and a semiconductor circuit is disposed in each of the rectangular regions, into the individual rectangular regions. This method includes a groove cutting step of cutting the face of the semiconductor wafer along the streets to form grooves along the streets on the face of the semiconductor wafer, and a back grinding step of grinding the back of the semiconductor wafer to reduce the thickness of the semiconductor wafer to not more than the depth of the grooves, thereby dividing the semiconductor wafer along the streets. This method further includes, before the back grinding step, a groove depth measuring step of measuring the depth of the grooves. In the back grinding step, rough grinding is performed until the thickness of the semiconductor wafer becomes greater than the depth of the grooves by a predetermined value, and then precision grinding is performed until the thickness of the semiconductor wafer becomes not more than the depth of the grooves.
Inventors:
Kazuhisa Arai
Takeuchi Masaya
Hiromi Hayashi
Hideyuki Yamado
Takeuchi Masaya
Hiromi Hayashi
Hideyuki Yamado
Application Number:
JP2001197308A
Publication Date:
April 13, 2011
Filing Date:
June 28, 2001
Export Citation:
Assignee:
Disco Co., Ltd.
International Classes:
B24B19/02; H01L21/301; B24B7/22; B24B27/06; B24B49/12; H01L21/304; H01L21/78
Domestic Patent References:
| JP2000294522A | ||||
| JP2002319554A | ||||
| JP2003007649A | ||||
| JP2001298003A | ||||
| JP6232258A | ||||
| JP11010481A | ||||
| JP6252260A | ||||
| JP7130692A | ||||
| JP10315129A | ||||
| JP58140403U |
Attorney, Agent or Firm:
Isao Sasaki
Kyoko Kawamura
Kyoko Kawamura