Title:
半導体ウェーハの内部欠陥測定方法、半導体ウェーハの製造方法及び半導体ウェーハの内部欠陥測定装置
Document Type and Number:
Japanese Patent JP4678458
Kind Code:
B2
Inventors:
Yoshida Chisa
Application Number:
JP2000339690A
Publication Date:
April 27, 2011
Filing Date:
November 07, 2000
Export Citation:
Assignee:
Shin-Etsu Semiconductor Co., Ltd.
International Classes:
G01B11/30; H01L21/66; G01N21/47; G01N21/63
Domestic Patent References:
| JP10197423A | ||||
| JP11204384A | ||||
| JP6258238A | ||||
| JP8124986A | ||||
| JP11274257A | ||||
| JP11014543A | ||||
| JP61101045A | ||||
| JP9246337A |
Attorney, Agent or Firm:
Masanori Sugawara