Title:
SEMICONDUCTOR WAFER TEST APPARATUS, METHOD, AND PROVE CARD FOR SEMICONDUCTOR WAFER
Document Type and Number:
Japanese Patent JP2009231848
Kind Code:
A
Abstract:
To provide a multi pin high weight semiconductor test apparatus for sure contact in a wafer package contact with a multi pin prove card or a prover device that requires high weight.
The wiring board of a prove card 10 is formed with an external wiring board 11 and an inside wiring board 12. A ring shape seal ring 16a is disposed around the inside wiring board 12 with an elastomer of rubber or the like. A vacuum valve 17a is mounted on the external wiring board 11. A vacuum conducting path 30a extending from the vacuum valve 17a is formed opened at the inner plane of the external wiring board 11 and the inside of the seal ring 16a.
Inventors:
TAGO TOSHIO
SATAKE TAKESHI
SATAKE TAKESHI
Application Number:
JP2009159165A
Publication Date:
October 08, 2009
Filing Date:
July 03, 2009
Export Citation:
Assignee:
ELFINOTE TECHNOLOGY CORP
International Classes:
H01L21/66; G01R1/06; G01R1/073; G01R31/28
Domestic Patent References:
| JPH11238770A | 1999-08-31 | |||
| JP2004053409A | 2004-02-19 | |||
| JPH11260872A | 1999-09-24 | |||
| JP2003007782A | 2003-01-10 |
Attorney, Agent or Firm:
Keiro Shibuya
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