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Title:
SENSE AMPLIFYING CIRCUIT
Document Type and Number:
Japanese Patent JPS5942694
Kind Code:
A
Abstract:

PURPOSE: To stabilize the operation and reduce the chip area for integration, by constituting a pull-up circuit with a high-impedance element in a sense amplifying circuit of a dynamic semiconductor storage device.

CONSTITUTION: The pull-up circuit of the sense amplifying circuit is constituted with the high-impedance element, and one end of a resistance H1 is connected to a bit line B1, and the other is connected to a terminal VCC, and similarly, a resistance R2 has one end connected to a bit line B2 and has the other connected to a terminal VCC. At a sense amplifying operation time, even if the high level of the bit line B1 is lowered considerably, the high level of the bit line B1 is raised to VCC by the resistance element. Even if the write level of external data to the bit line is low, the high level of the bit line B1 is raised to VCC by the resistance element. Further, since the pull-up circuit is constituted with one resistance element, the occupied area of the pull-up circuit is small.


Inventors:
SHIMIZU TAMIO
Application Number:
JP15205882A
Publication Date:
March 09, 1984
Filing Date:
September 01, 1982
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G11C11/419; G11C11/34; G11C11/409; (IPC1-7): G11C7/06
Attorney, Agent or Firm:
Uchihara Shin