PURPOSE: To achieve a converter of multi-bit and low cost, by correcting a converted digital value for output, in a sequential comparison type A/D converter using two D/A converters of low accuracy as high-order and low-order digits.

CONSTITUTION: Clocks of a clock generator 14 are applied to a register 13 in n bits, the outut of the register 13 is applied to a high-order D/A converter 11 and a low-order D/A converter 15, and the analog input at a terminal P3 is compared with the output of the converters 11, 15 at a comparator 12. This compared output is applied to the register 13, this operation is sequentially compared and a digital value is obtained at the register 13. When the conversion is finished, the generator 14 transmits the operation clock to an operator 17, the operator 17 corrects the digital value of the register 13 with the correction value stored in a memory 16 and an output digital signal is obtained at a terminal P4.