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Title:
SEQUENTIAL TRIGGER ENABLING FUNCTION CIRCUIT
Document Type and Number:
Japanese Patent JPH02252033
Kind Code:
A
Abstract:

PURPOSE: To easily set up an enable pointer by providing a sequential trigger enabling function circuit with a shift register part for using enable pointer data read out from a memory as a shift clock signal, a register part for setting up data indicating the number of enable points, and so on.

CONSTITUTION: When a program address signal is applied to memories 11, 12 and the applied signal coincides with the address signal of the 1st enable point(ENP) 1 set at the memory 11, enable point data D0 to D3 are read out. Since D0 = '1' is set, the terminal Q of an FF 18 in the shift register part 13 is turned to '1'. When the program address signal coincides with the address signal of the 2nd enable point(ENP) 2, the enable point data of D1 = '1' are read out from the memory 11, so that the terminal Q of an FF 19 is turned to '1'. The terminal Q of FFs 18 to 21 are similarly turned to '1'. Thereby, a signal from the terminal C3 of a selector 15 is selected and the output signal is turned to '1'.


Inventors:
MIYAMOTO HIROAKI
Application Number:
JP7182489A
Publication Date:
October 09, 1990
Filing Date:
March 27, 1989
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F11/28; (IPC1-7): G06F11/28
Attorney, Agent or Firm:
Shoji Kashiwaya (1 person outside)