Title:
SERIAL DATA TRANSFER EQUIPMENT
Document Type and Number:
Japanese Patent JP2593017
Kind Code:
B2
Abstract:
PURPOSE: To synchronously transfer serial data in order by controlling a counting operation based on a word signal and a clock pulse and determining the shift timing of a conversion circuit.
CONSTITUTION: A detection circuit 11 outputs a detection signal (a) each time the significant edge of a word signal LR is given. When the signal (a) is given, parallel data P is load to a P/S conversion circuit 12. When the counted value of a clock pulse counting circuit 14 satisfies prescribed conditions, bit shift is stated. An initial value for counting to be set in a clock pulse counting circuit 13 when the signal (a) is given indicates a bit number per word of the serial data to be transferred. The transfer timing of the serial data during a period where the signal LR takes a second logic value is controlled by means of the number of clock pulses during the period where the signal takes a first logic value. The transfer timing of the serial data is controlled by means of the number of the clock pulses during the period where the signal LR takes the second logic value.
Inventors:
MARUKAWA HIROSHI
Application Number:
JP27272191A
Publication Date:
March 19, 1997
Filing Date:
October 21, 1991
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H03M9/00; H04L13/10; H04L29/08; (IPC1-7): H04L13/10; H03M9/00; H04L29/08
Domestic Patent References:
| JP6367054A | ||||
| JP210952A | ||||
| JP59161154A |
Attorney, Agent or Firm:
Hiroshi Maeda (2 outside)