PURPOSE: To eliminate the need for an LSI for exclusive parallel-serial conversion by taking the timing of transmission/reception of serial data by software in a one-chip CPU, a simple gate circuit and a counter.

CONSTITUTION: When a key is depressed in a keyboard switch 1, the position information is fetched in the CPU2. When the data to be transmitted is prepared, a counter-on signal C is transmitted and when a counter 40 receives it, a serial clock signal SCL1 is given to the CPU2 in response to the transfer speed of the serial data. The CPU2 counts the signal SCL1 and transmits data SD in the timing ST at each prescribed count. A received data RD is transmitted from a data line 7 and its start signal STA is inputted to the CPU2 and the counter 40, then the serial clock signal SCL1 is given to the CPU2 to interrupt the reception operation, the reception timing is formed based on this signal SCL1, there by reading the data.