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Title:
SERIAL SIGNAL SAMPLING METHOD
Document Type and Number:
Japanese Patent JPS6075141
Kind Code:
A
Abstract:

PURPOSE: To prevent an error signal from being fetched by performing plural number of times of sampling in each bit period of a serial signal and fetching the result of processing of majority decision to each sampling value as a reception signal.

CONSTITUTION: When the 2nd unit 2 brought to the transmission mode transmits a serial signal, the serial signal is fed to the 1st unit 1 via a signal line 4. When the serial signal is fed to the 1st unit 1, the unit 1 detects a start bit SB. The lapse of a time t1 is detected by allowing a timer to start at the trailing edge of the start bit SB. Then a sampling data is inputted by sampling an input data DBi at the point of time elapsed for the time t1. After each bit is sampled three times each, the sampling value is applied with majority decision and a true value is obtained.


Inventors:
FUJII MASAHIKO
INOMATA MOTOI
Application Number:
JP18410683A
Publication Date:
April 27, 1985
Filing Date:
September 30, 1983
Export Citation:
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Assignee:
NIPPON DENKI HOME ELECTRONICS
International Classes:
H04L1/00; G05B9/03; H04L25/06; (IPC1-7): G05B9/03; H04L1/00
Domestic Patent References:
JPS50702A1975-01-07