To provide a shift register wherein high image quality of a display device can be maintained for a further long time by enhancing reliability of a driving circuit of a display panel without obstructing miniaturization of the driving circuit and stably adjusting the potential of a gate line for a further long time.
A first pull up drive control section (51) receives a gate signal (GOUTM-1) from the last adjacent stage and outputs a control signal (CNTRM) based on the gate signal. A pull up drive section (53) outputs a first clock signal (CLK) as the gate signal (GOUTM-1) to a corresponding gate line through an output terminal (OUT) in response to the control signal (CNTRM). A pull down drive section (54) inactivates the corresponding gate line connected to the output terminal (OUT) in response to a second clock signal (CKB). A pull down transistor (Td) is turned on or off in response to the second clock signal (CKB).
LEE JOO-HYOUNG
KIM HYUNG-GUEL
LEE MYUNG-WOO
| JPS5275943A | 1977-06-25 | |||
| JP2001273785A | 2001-10-05 | |||
| JP2001282169A | 2001-10-12 | |||
| JPH05267636A | 1993-10-15 | |||
| JP2004078172A | 2004-03-11 | |||
| JP2001320546A | 2001-11-16 |
Tomoko Inazumi