PURPOSE: To obtain a shift register which can reduce the irregularity in transmission delay time.
CONSTITUTION: A data driver 3 for an LCD panel is constituted of a sampling transistor group 4 and a shift register group 5. In the shift register group 5, shift register blocks constituted of one- to four-series shift registers composed of right and left normal redundant shift registers SR1 to SR4 and one- to four- series connection parts S1 to S4 are installed. The one- to four-series connection parts S1 to S4 are arranged respectively independently, and only one out of the one- to four-series connection parts S1 to S4 is arranged between register blocks RB1 to RB4 constituted of the one- to four-series shift registers. The one- to four-series shift registers SR1 to SR4 in the respective register blocks are respectively at an identical distance.
WADA ATSUSHI
FURUKAWA MASAYUKI
