To provide a shift register in which shift register operation can be achieved in a small chip area and which can be operated only by rise (or fall) edge of a clock input.

When a control signal CK(36) is low and a control signal CKb(37) is high, an input signal D(11) is applied to the inverter 14 of a latch cell 13 through a switch 12, the output signal of the inverter 14 is reversed by an inverter 16 as the output of the latch cell 13 and becomes a shift output Q0(17). The switch 18 is operated at the point of time of fall of the control signal CKb(37), that is, at the point of time of rise of a clock input CK_in(34), and the output of the latch cell 13 is passed, in addition to an inverter 20 of a latch cell 19, the output of the inverter 20 becomes a shift output Q1(22) as the output of the latch cell 19. In the same way, the input signal D(11) is transmitted successively to shift output Q2(28), Q3(33).