Title:
【発明の名称】昇圧及び降圧回路
Document Type and Number:
Japanese Patent JP3092636
Kind Code:
B2
Abstract:
PURPOSE:To obtain a step-up and step-down circuit having a small number of signal lines and usable for either of step-up and step-down. CONSTITUTION:This step-up and step-down circuit is provided with a MOS transistor transmitting a signal from a first power supply voltage circuit group, a CMOS inverter receiving the second power supply voltage while inverting a signal from the MOS transistor and a MOS transistor receiving the second power supply voltage while performing positive feedback of output of the CMOS inverter to the input side of the CMOS inverter.
Inventors:
Masaharu Hamasaki
Application Number:
JP7333892A
Publication Date:
September 25, 2000
Filing Date:
February 24, 1992
Export Citation:
Assignee:
ソニー株式会社
International Classes:
H01L21/822; H01L27/04; H02M3/07; H04N5/335; H04N5/369; H04N5/372; H04N5/374; H04N5/378; (IPC1-7): H01L27/04; H01L21/822
Domestic Patent References:
| JP4211515A | ||||
| JP3263133A | ||||
| JP289345A |
Attorney, Agent or Firm:
Hideaki Ogawa