Title:
SHOCK PREVENTING CIRCUIT
Document Type and Number:
Japanese Patent JPS61195402
Kind Code:
A
Abstract:
PURPOSE:To suppress the sudden change of a control signal by comparing the deviation between a reference waveform and an input signal with the prescribed fixed value through a comparing/discriminating circuit and delivering the value decided by said reference waveform when the deviation exceeds a fixed level. CONSTITUTION:A shock preventing circuit suppresses the sudden change of the error voltage (input signal) SI to obtain an output signal SO and delivers this signal SO to a rotary device which turns a rotary barrel. Here the shock preventing circuit consists of a reference pattern generating circuit 76, a comparing/discriminating circuit 71 and a signal switch circuit 73. The circuit 76 produces a reference waveform signal SA following the signal SI through the 1st comparator 70 and an integrator 74 and detects the deviation between the signal SA and the signal SI to deliver it to an absolute value circuit 77 and a deviation setting unit 78. When this deviation exceeds a fixed level, the value obtained from the signal SA is delivered as the signal SO. While the signal SI is delivered as it is when said deviation is less than the fixed level.
Inventors:
KODERA MASASATO
AIZAWA YASUO
AIZAWA YASUO
Application Number:
JP3686285A
Publication Date:
August 29, 1986
Filing Date:
February 26, 1985
Export Citation:
Assignee:
NIIGATA ENGINEERING CO LTD
International Classes:
G05B1/01; G05B5/01; (IPC1-7): G05B1/01
Domestic Patent References:
| JPS5576401A | 1980-06-09 | |||
| JPS50116881A | 1975-09-12 | |||
| JPS50155881A | 1975-12-16 |
Attorney, Agent or Firm:
Masatake Shiga