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Title:
SHORT CHANNEL MOS-TYPE TRANSISOR AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPH0621449
Kind Code:
A
Abstract:

PURPOSE: To improve characteristics of a MOS-type transistor with a short channel while forming its channel part in a desired impurity concentration, by suppressing the redistribution of the impurities of its channel part through the process subjected to a temperature fall.

CONSTITUTION: In a MOS-type transistor with a short channel, a gate 15 is formed on a semiconductor substrate 11 via a gate insulating film 14, and shallow diffusion layer regions 16, 17 are formed on the upper layers of the substrate 11, which are laid on both the sides of the gate 15, and insulating parts 18, 18 are formed on both the sides of the gate 15, and further, source.drain regions 19, 20, whose levels are nearly equal to the gate 15, are formed respectively on the regions 16, 17, and moreover, on the upper layers thereof, low resistance layers 21, 22 are formed respectively. Alternatively, in the transistor, on the upper layers of the substrate 11, which are laid on the oppsite sides of the insulating parts 18, 18 to the gate 15, the shallow diffusion layer regions 16, 17 are formed respectively, and further, on the upper layer of the substrate 11, an insulating layer is formed, and moreover, on this insulating layer, the sourece.drain regions 19, 20, whose levels are nearly equal to the gate 15, are so formed as to be connected respectively with the shallow diffusion layer regions 16, 17.


Inventors:
MORIYAMA ICHIRO
Application Number:
JP20311692A
Publication Date:
January 28, 1994
Filing Date:
July 06, 1992
Export Citation:
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Assignee:
SONY CORP
International Classes:
H01L27/08; H01L29/78; (IPC1-7): H01L29/784; H01L27/08
Attorney, Agent or Firm:
Funabashi Kuninori