Title:
SHORT CIRCUIT OUTPUT CURRENT LIMITING CIRCUIT AND LIMITING METHOD OF CURRENT THEREOF
Document Type and Number:
Japanese Patent JPH03184418
Kind Code:
A
Abstract:
PURPOSE: To quickly execute output switching operation from a low signal to a high signal while protecting a host output transistor(TR) from a damage current generated by the short-circuit of an output by discharging a capacitor element and allowing a current to flow into the host output TR at the time or switching a low signal logic state to a high signal logic state. CONSTITUTION: In the case of switching an output from a low logic state to a high logic state, a TR 30 is conducted and a diode 24 is allowed to discharge a currents to the collector of the host output TR 14 through the base-emitter connection of the TR 30. When an output is short-circuited to ground (e.g. in testing), an extremely high current is allowed to flow for an extremely short period and the current flow is too short to damage the host TR 14. Consequently an output current at the time of switching an output signal from low to high can be prevented from being increased to a dangerous level for a long time while increasing the overall operation speed of a TTL(transistor transistor logic) gate 22.
Inventors:
KEBIN EMU OBUNZU
JIEFURII EI NIIHAUSU
BOBU DEII SUTORONGU
JIEFURII EI NIIHAUSU
BOBU DEII SUTORONGU
Application Number:
JP28054690A
Publication Date:
August 12, 1991
Filing Date:
October 18, 1990
Export Citation:
Assignee:
TEXAS INSTRUMENTS INC
International Classes:
H03K17/08; H03K19/003; H03K19/013; H03K19/088; (IPC1-7): H03K17/08; H03K19/003; H03K19/088
Attorney, Agent or Firm:
Akira Asamura (3 outside)