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Title:
SiC EPITAXIAL WAFER AND SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2018065737
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a SiC epitaxial wafer capable of reducing the resistance of an impurity layer.SOLUTION: A SiC epitaxial wafer comprises: a 4H-SiC substrate 100; a first p type SiC epitaxial layer 102 including a p type impurity (an element A) and a n type impurity (an element D) in which a combination of the element A and the element D is Al, Ga or In and at least one of N, B and P and a concentration ratio of the element D to the element A is 0.33-1.0; a second n type SiC epitaxial layer 106 provided between the SiC substrate and the first SiC epitaxial layer; and a third p type SiC epitaxial layer 108 provided between the second and first SiC epitaxial layers and having a p type impurity concentration lower than that of the first SiC epitaxial layer. The SiC substrate is a n type and has a n type impurity concentration higher than that of the second SiC epitaxial layer, and the concentration of the element A is 1×10- 1×10cm.SELECTED DRAWING: Figure 10

Inventors:
NISHIO JOJI
SHIMIZU TATSUO
OTA CHIHARU
SHINOHE TAKASHI
Application Number:
JP2017178373A
Publication Date:
April 26, 2018
Filing Date:
September 15, 2017
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
C30B29/36; C23C16/42; C30B25/20; H01L21/20; H01L21/205; H01L21/336; H01L29/06; H01L29/12; H01L29/78; H01L29/861; H01L29/868
Domestic Patent References:
JP2012178412A2012-09-13
Other References:
MASANORI MIYATA ET.AL: "Theoretical Study of Acceptor-Donor Cmplexes in 4H-SiC", APPLIED PHYSICS EXPRESS, vol. 1, JPN7017000181, October 2008 (2008-10-01), pages 111401, ISSN: 0003987795
Attorney, Agent or Firm:
Tetsuma Ikegami
Akira Sudo
Mitsuyuki Matsuyama



 
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