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Patent Searching and Data


Title:
SIGMOID FUNCTION GENERATING CIRCUIT
Document Type and Number:
Japanese Patent JPH09305687
Kind Code:
A
Abstract:

To provide a hardware in simple configuration and to easily product it by subtracting two outputs from a differential amplifier for impressing load to an input to a neuron from the power supply voltage of the differential amplifier, dividing both the outputs, adding a constant voltage to the output of an analog division circuit and dividing the divided result with the added result.

An analog subtracter 201 subtracts the input of a terminal 2 from the input of a terminal 1, an analog subtracter 202 subtracts the input of a terminal 4 from the input of a terminal 3, (Vcc-V1) appears at a terminal 5, (Vcc-V2) appears at a terminal 6, these voltages are impressed to terminals 7 and 8 and the input of the terminal 7 is divided with the input of the terminal 8. As a result, (Vcc-V1)/(Vcc-V2) is outputted to a terminal 9. The constant voltage is impressed to a terminal 11, where this voltage is defined as the input from a terminal 10, and an analog adder 204 adds the constant voltage to the input of the terminal 10. As a result, [1+(Vcc-V1)/(Vcc-V2)] is outputted to a terminal 12. An analog divider 205 defines the output to the terminal 9 as the input of a terminal 13, defines the output to the terminal 12 as the input of a terminal 14 and divides the input of the terminal 13 with the input of the terminal 14.


Inventors:
INADA HIROFUMI
Application Number:
JP11792896A
Publication Date:
November 28, 1997
Filing Date:
May 13, 1996
Export Citation:
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Assignee:
SUMITOMO METAL IND
International Classes:
G06G7/60; G06F15/18; G06G7/26; G06N3/063; (IPC1-7): G06G7/60; G06F15/18
Attorney, Agent or Firm:
河野 登夫