PURPOSE: To improve the resolution, by increasing the number of uniform quantized bits in a polygonal segment without increasing the number of transmission bits.
CONSTITUTION: A signal compander ANDs the output state of a binary counter 3, controls a data selector 8, outputs a polarity bit when the outputs of the binary counter 3 are all 1, increases the uniform quantization bit number in a mantissa, i.e., polygonal segment by 1 bit without the polarity bit, and transmits the mantissa and index sections only. At expanding, the compander discriminates whether or not the index section is all 1, and if not, the MSB of the mantissa is used as the polarity bit under the condition that the MSB of the mantissa and the content of the polarity bit are the same, the uniform quantization bit number in the polygonal segment is increased.
JPS60263529 | EXPANDING CIRCUIT |
JPH04371032 | DIGITAL DATA PROCESSING CIRCUIT |
WO/1996/026478 | LOGARITHM/INVERSE-LOGARITHM CONVERTER UTILIZING LINEAR INTERPOLATION AND METHOD OF USING SAME |