Title:
SIGNAL DETECTION CIRCUIT
Document Type and Number:
Japanese Patent JP2023025887
Kind Code:
A
Abstract:
To provide a circuit capable of detecting signal level in high accuracy.SOLUTION: A signal detection circuit SD1 includes a signal input circuit SG, a bias circuit BA connected to the signal input circuit SG, a reference voltage generation circuit BL, and a comparing circuit CP connected to the signal input circuit SG and the reference voltage generation circuit BL. The bias circuit BA includes a first constant current source A1 connected to a first power supply P1, and a first diode D1 arranged between the first constant current source A1 and a reference voltage. The signal input circuit SG includes capacitors C1A, C1B and second diodes D2A, D2B. The first diode D1 is diode-matched with the second diodes D2A, D2B. The reference voltage generation circuit BL includes a second constant current source A2 connected to a second power supply P2. The comparing circuit CP detects an AC signal based on level comparison between a signal level VFDC generated by the signal input circuit SG and a reference level VREF generated by the reference voltage generation circuit BL.SELECTED DRAWING: Figure 2
Inventors:
ADACHI SHINGO
Application Number:
JP2021131317A
Publication Date:
February 24, 2023
Filing Date:
August 11, 2021
Export Citation:
Assignee:
MEGA CHIPS CORP
International Classes:
H03K5/08; H04L25/02
Attorney, Agent or Firm:
Masahiro Nakagawa
Go Sakane
Hideyuki Sawamura
Go Sakane
Hideyuki Sawamura