Title:
SIGNAL DETECTION OF DATA STORAGE APPARATUS, AND DEVICE THEREFOR
Document Type and Number:
Japanese Patent JP3958405
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To detect an original recording signal by including a stage for using the error obtd. by subtracting an output signal from a reference signal and equalizing the tap count of an adaptive type partial response target equalizer by a method of least mean squares.
SOLUTION: A nonlinear LMS adaptation device(NLA) 13 is inputted with a training signal t[k], input signal a[k] and the output signal x[k] of the adaptive type partial response target equalizer (PREQ) 11 and adapts this PREQ 11 to an optimum state. The input signal a[k] is converted to the output signal x[k] of the form easily usable in a Viterbi algorithm equalizer(VAEQ) 15 while passing the PREQ 11. The output signal x[k] is inputted to the NLA 13 where the equalization error of the PREQ 11 is determined together with the training signal t[k] and the input signal a[k]. The NLA 13 adapts the tap count of the PREQ 11 according to a general LMS or signed LMS system by using the equalization error value described above.
Inventors:
Kinseichin
Application Number:
JP14974897A
Publication Date:
August 15, 2007
Filing Date:
June 06, 1997
Export Citation:
Assignee:
Samsung Electronics Co.,Ltd.
International Classes:
G06F3/06; G11B20/10; H03H21/00; H04L25/497; H04L25/03; (IPC1-7): G11B20/10
Domestic Patent References:
JP4067407A | ||||
JP8022680A | ||||
JP8030998A | ||||
JP8115503A | ||||
JP9073726A | ||||
JP60136902A | ||||
JP61114611A | ||||
JP64082303A |
Attorney, Agent or Firm:
Masatake Shiga
Takashi Watanabe
Shigeo Naruse
Takashi Watanabe
Shigeo Naruse
Previous Patent: MANUFACTURE OF METALLIC DECORATIVE MATERIAL
Next Patent: PIT-INSTALLED TYPE SPEED GOVERNOR
Next Patent: PIT-INSTALLED TYPE SPEED GOVERNOR