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Patent Searching and Data


Title:
SIGNAL DISTRIBUTING SYSTEM
Document Type and Number:
Japanese Patent JPS5939190
Kind Code:
A
Abstract:

PURPOSE: To reduce the load of a central controller and to transmit information, by adding an identifying code to voice and line control information and storing the result to a prescribed area of a channel memory having a time division switch so as to distribute each identifying code to a link controller in other path than the time division channel.

CONSTITUTION: Line control information to be transmitted to each subscriber circuit LC from a central controller CC is stored once in a control signal storage memory SSM. Further, each of the voice information and the line control information written in a channel memory SPM is added with an identification code S1, stored in a prescribed area of a memory SPM via a selecting circuit SEL operated in synchronizing with a write address of a count circuit CNT and the identification code S1 is stored at the same time. The line control information and the voice information from the memory SPM are extracted from an address designated by a control memory CM and transmitted to the circuit LC via a multiplex separating circuit DMPX and a time division channel P2. Further, the identification code S1 is transmitted to the circuit LC via the other multiplex separation circuit DMPX to releive the load of the device CC.


Inventors:
KATANO HIROKI
FUJISAWA MASATO
NOJIRI SHIYOUJI
NOZAKI TADAO
Application Number:
JP14890482A
Publication Date:
March 03, 1984
Filing Date:
August 27, 1982
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04Q3/545; H04Q11/04; (IPC1-7): H04Q3/54
Attorney, Agent or Firm:
Koshiro Matsuoka