Title:
SIGNAL ENCODER AND SIGNAL DECODER
Document Type and Number:
Japanese Patent JP3292228
Kind Code:
B2
Abstract:
PURPOSE: To encode/decode two signals with simple configuration.
CONSTITUTION: A first signal Si1(t) and a second signal Si2(t) are respectively inputted to input terminals 41a, 41b and successively supplied to overlap circuits 42a and 42b, windowing units 43a, 43b and FFT circuit 44. At the FFT fast Fourier transformation circuit 44, the first signal Si1(t) is inputted to a real part, the second signal Si2(t) is inputted to an imaginary part, and Fourier transformation is performed. An amplitude component Ai(t) supplied from a polar coordinate transforming unit 45 is supplied to a local amplitude decoder 52 and the residual amplitude component &utri Ai(t) is outputted to a quantizer 50. At the quantizer 50, the residual amplitude component &utri Ai(t) is second quantized and a quantized residual amplitude component &utri ai'(t) is found and supplied to a multiplexer 62. Besides, a phase component Pi(t) is similarly quantized as well.
Inventors:
Toshihiro Maruyama
Susumu Takahashi
Susumu Takahashi
Application Number:
JP17685495A
Publication Date:
June 17, 2002
Filing Date:
June 19, 1995
Export Citation:
Assignee:
Victor Company of Japan Ltd.
International Classes:
H04N19/115; G10L19/00; G10L19/02; G10L19/08; H03M7/30; H04N7/24; H04N19/00; H04N19/126; H04N19/169; H04N19/176; H04N19/196; H04N19/42; H04N19/423; H04N19/50; H04N19/60; H04N19/61; H04N19/635; (IPC1-7): H03M7/30; G10L19/00; G10L19/08; H04N7/24
Domestic Patent References:
| JP697836A | ||||
| JP75896A | ||||
| JP8293797A | ||||
| JP4504192A |
Other References:
【文献】E.O.Brigham著、宮川、今井訳,二つの実数値関数の同時FFT,高速フーリエ変換,日本,科学技術出版社,1979年12月15日,2,185
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