PURPOSE: To simplify the hardware or software of an external circuit and to reduce the number of signal lines between the external circuits by controlling a data bus exclusive right depending on applications in a signal multiplex transmission LSI.

CONSTITUTION: When the level of a selection pin 5 of a new word multiple transmission LSI 2 is at a 'H' level, a transmission request signal reception section 3a is in the operatable state, and when an external circuit 1 sends a transmission request signal (a) representing the presence of data to be sent, a transmission permission signal (b) is returned from a transmission permission signal transmission section 3b and the external circuit 1 outputs the transmission data to a data bus 6. The signal multiplex transmission LSI 2 fetches the data at a signal multiplex section 4 for multiplexing and the result is outputted to a multiplex signal output line 9 as a serial signal. When the selection pin 5 is at 'L' level, an automatic transmission permission signal generating section 3C is operated to generate periodically the transmission permission signal, which is sent from the transmission permission signal transmission section 3b to the external circuit 1. In this case, no transmission request signal line 7 is required.