PURPOSE: To know easily a phase difference of the second input signal by delaying the first input signal by a delay time of two kinds or more.

CONSTITUTION: The first input signal is outputted by being delayed by times T1WT4, respectively, in a delaying circuit 3. Therefore, for instance, the delay times T1WT4 are set so that they are in a relation of T1<T2<T3<T4, and they have a time difference of 10nsec each to each other, and on the other hand, the second input signal 22 is inverted by an inverter 2 and becomes an inversion signal 22a. In case of executing a phase comparison, the signals 21, 22 are inputted, and by a timing in which each signal rises, a data of '1' in case the signal 22a is '1', and of '0' in case said signal is '0' is held in each corresponding FF circuit 4W8. For instance, when display means 9W11 of the circuits 4W6 for holding the data of '1' are lighted, a delay of a phase to the signal 21 of the signal 22 becomes 10nsec×3, can be read as 30nsec, and a phase difference of two input signals can be compared easily and quantitatively.