Title:
SIGNAL PHASE CONTROL CIRCUIT
Document Type and Number:
Japanese Patent JP3671782
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a control circuit, with which optimal phase setting can be performed by controlling the difference of delay time between signal lines even when the distribution of normally receivable phase change amounts is divided into plural continuous regions.
SOLUTION: The phase change amount of a signal to be transmitted is fluctuated just for one circuit frequency of the operating frequency of the circuit. It is continuously judged whether a receiving signal can be normally received during this fluctuation or not and the distribution of normally receivable phase change amounts is detected. The region, where the detected phase change amount is continued, is grasped and among plural existent regions, the area having a width greater than a prescribed value or region having the maximum width is selected, this is specified as an optimal phase region and from the upper and lower limit values of this region, an optimal sampling phase change amount is determined.
Inventors:
Jun Kisaki
Toshiyuki Shimizu
Toshiyuki Shimizu
Application Number:
JP35158999A
Publication Date:
July 13, 2005
Filing Date:
December 10, 1999
Export Citation:
Assignee:
富士通株式会社
International Classes:
G06F15/163; H03L7/00; H04L7/02; H04L7/04; H04L25/02; H04L7/033; (IPC1-7): H04L7/02; G06F15/163; H04L25/02
Domestic Patent References:
| JP11136312A | ||||
| JP10308730A |
Attorney, Agent or Firm:
Junichi Yokoyama