Title:
SIGNAL PROCESSING CIRCUIT OF COMBINATIONAL LOGIC TYPE
Document Type and Number:
Japanese Patent JPS59218030
Kind Code:
A
Abstract:
PURPOSE: To attain filtering at the same time when plural signals are operated by fetching a signal processed for the operation in one time slot of time division and preparing a numeric table required for the operation.
CONSTITUTION: The product sum between an output of a filter and an external signal is attained by using one circuit by way of the external signal so as to be used as a variable of product sum in place of an input/output value of the filter and its delayed value in taking notice that a calculating formula of the digital filter is the product sum between a fixed constant and the variable.
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Inventors:
FURUYA NOBUO
Application Number:
JP9146283A
Publication Date:
December 08, 1984
Filing Date:
May 26, 1983
Export Citation:
Assignee:
ANRITSU ELECTRIC CO LTD
International Classes:
H03H17/02; H03H17/04; (IPC1-7): H03H17/02
Attorney, Agent or Firm:
Masataka Kobayashi