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Title:
信号処理回路及び変成器
Document Type and Number:
Japanese Patent JP3778569
Kind Code:
B2
Abstract:
In an amplifier module circuit, an input transformer (TI) transforms an input signal (ISU) into a transformed input signal (ISB), which is supplied to a pair of amplifiers (AMPA, AMPB). In addition to windings (W1, W2) for input signal transformation, the core (CO) of the transformer (TI) is provided with an auxiliary winding (W3) for biasing the pair of amplifiers (AMPA, AMPB). A DC bias voltage (VB) is supplied to a tap (XT) on the auxiliary winding (W3) whose ends are DC coupled to the input transistors (QA, QB) of the pair of amplifiers (AMPA, AMPB).

Inventors:
Van de vestero marcel henryx wilhelms
Application Number:
JP53632596A
Publication Date:
May 24, 2006
Filing Date:
May 07, 1996
Export Citation:
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Assignee:
Koninklijke Philips Electronics N.V.
International Classes:
H01F19/06; H03F3/26; H03H7/42; H03H11/02; H03H11/32
Domestic Patent References:
JP4234105A
JP50021047Y1
JP52055358A
JP55162915U
JP58191613U
JP1235216A
JP5259943A
Attorney, Agent or Firm:
Kosaku Sugimura
Norita Tomita
Junko Sugimura
Hiroshi Tokunaga
Kazuaki Takami
Umemoto Masao