PURPOSE: To obtain a digital output signal to be a clamp level same as a target level by feeding a clamp error voltage back to the clamp voltage in the front stage of an A/D conversion circuit.
CONSTITUTION: At the time of A>B when an input A from an A/D conversion circuit 3 is larger than an input B from an input terminal 5, a signal at an L level is obtained at an output end O1 of a comparator 21 and a signal at an H level is obtained at an output end O2. These signals are sampled by a sampling pulse and the signal at the H level is obtained at the terminals Q of flip-flop circuits 22 and 23. Then, the signal at the H level is obtained even at the terminals Q as well. A transistor 25 is turned OFF and a transistor 26 is turned ON. Then, charges accumulated at a capacitor 27 are discharged through this transistor 26. This voltage is taken out by a buffer 28, supplied through a resistor 29 to one adder 11 and added with an analog reference voltage and the clamp level is decreased. At the time of A<B, the clamp level is increased and at the time of A=B, the former state is held.
SHIMIZU HIDEO
WATANABE TAKEMOTO
IKEDA YASUNARI
SONY CORP