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Patent Searching and Data


Title:
SIGNAL PROCESSING CIRCUIT
Document Type and Number:
Japanese Patent JPS6235705
Kind Code:
A
Abstract:

PURPOSE: To easily correct or reduce an error in an analog signal with small- scale constitution by mixing analog signals mutually and delaying one of the analog signal which is inputted to a switched capacitor by one sampling period.

CONSTITUTION: The 1st switching means S11 and S21 charge two capacitors C1 and C2 to levels V1 and V2 of an analog input signal Vi. the 2nd switching means S12 and S22 turn on and off complementarily to the 1st switching means S11 and S21 and when both switching means S12 and S22 turn on, those capacitors C1 and C2 are connected in common. The common connection point is led to a processing output (V0) terminal. Further, a delay circuit 1 generates a delay time difference of one sample period between the analog input signal levels V1 and V2 charged in the capacitors C1 and C2 respectively.


Inventors:
HABUKA TOSHITO
Application Number:
JP17412685A
Publication Date:
February 16, 1987
Filing Date:
August 09, 1985
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H03K5/1252; H03H19/00; H03K5/00; (IPC1-7): H03H19/00; H03K5/00
Attorney, Agent or Firm:
Katsuo Ogawa